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1 ? fn6557.0 isl54205b mp3/usb 2.0 high speed switch with negative signal handling the intersil isl54205b dual spdt (single pole/double throw) switches combine low distortion audio and accurate usb 2.0 high speed data (480mbps) signal switching in the same low voltage device. when operated with a 2.7v to 3.6v single supply these analog switc hes allow audio signal swings below-ground, allowing the use of a common usb and audio headphone connector in personal media players and other portable battery powered devices. the isl54205b incorporates circuitry for detection of the usb v bus voltage, which is used to switch between the audio and usb signal sources in the portable device. the part has a control pin to open all the switches and put the part in a low power down state. the isl54205b is available in a small 10 ld 2.1mmx1.6mm ultra-thin tqfn package and a 10ld 3mmx3mm tdfn package. it operates over a te mperature range of -40 to +85c. related literature ? application note an1280 ?isl54205eval1z evaluation board user?s manual. ? technical brief tb363 ?guidelines for handling and processing moisture sensit ive surface mount devices (smds)? ? application note an557 ?recommended test procedures for analog switches? features ? high speed (480mbps) and full speed (12mbps) signaling capability per usb 2.0 ? low distortion negative signal capability ? detection of v bus voltage on usb cable ? control pin to open all switches and enter low power state ? low distortion headphone audio signals - thd+n at 20mw into 32 load . . . . . . . . . . . . . <0.1% ? cross-talk (20hz to 20khz) . . . . . . . . . . . . . . . . . . -110db ? single supply operation (v dd ) . . . . . . . . . . . . 2.7v to 3.6v ? -3db bandwidth usb switch . . . . . . . . . . . . . . . . . 630mhz ? available in tqfn and tdfn packages ? pb-free (rohs compliant) ? compliant with usb 2.0 short circuit requirements without additional external components applications ? mp3 and other personal media players ? cellular/mobile phones ?pda?s ? audio/usb switching application block diagram isl54205b usb transceiver high-speed codec com - com + v bus gnd d- d+ l r v dd ctrl logic circuitry controller 22k 4m 4m 50k 50k usb/headphone jack data sheet september 25, 2007 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2007. all rights reserved all other trademarks mentioned are the property of their respective owners.
2 fn6557.0 september 25, 2007 pinouts (note 1) isl54205b (10 ld tqfn) top view isl54205b (10 ld tdfn) top view note: 1. isl54205b switches shown for v bus = logic ?0? and ctrl = logic ?1?. 1 3 4 d- com - l vbus ctrl 2 10 5 7 8 d+ com + r gnd 9 6 vdd logic control 4m 4m 50k 50k 2 4 5 d- com - l vbus 3 7 8 d+ com + r 9 6 vdd logic control 4m 50k 50k 1 gnd 10 4m ctrl truth table isl54205b v bus ctrl l, r d+, d- 00offoff 01onoff 1xoffon ctrl: logic ?0? when 0.5v or float, logic ?1? when 1.4v v bus : logic ?0? when v dd + 0.2v or float, logic ?1? when v dd + 0.8v ordering information part number part marking temp. range (c) package (pb-free) pkg. dwg. # isl54205biruz-t* (note 2) fw -40 to +85 10 ld tqfn tape and reel l10.2.1x1.6a ISL54205BIRTZ-t* (note 3) 205b -40 to +85 10 ld tdfn tape and reel l10.3x3a ISL54205BIRTZ (note 3) 205b -40 to +85 10 ld tdfn l10.3x3a isl54205eval1z evaluation board *please refer to tb347 for detai ls on reel specifications. notes: 2. these intersil pb-free plastic packaged prod ucts employ special pb-free material sets; molding compounds/die attach materials and nipdau plate - e4 termination finish, which is rohs compliant and compat ible with both snpb and pb-free soldering operations. intersi l pb-free products are msl classified at pb-free peak re flow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std -020. 3. these intersil pb-free plastic packaged prod ucts employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate plus anneal - e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free solderin g operations. intersil pb-free products are msl classified at pb-fr ee peak reflow temperatures that meet or exceed the pb-free re quirements of ipc/jedec j std-020. isl54205b
3 fn6557.0 september 25, 2007 pin descriptions pin number name function 1 vdd power supply 2 vbus digital control input 3 com- voice and data common pin 4 com+ voice and data common pin 5 gnd ground connection 6 r audio right input 7 l audio left input 8 d+ usb differential input 9 d- usb differential input 10 ctrl digital control input (audio enable) isl54205b
4 fn6557.0 september 25, 2007 absolute maximum rati ngs thermal information v dd to gnd. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 6.0v input voltages d+, d-, l, r (note 4) . . . . . . . . . . . . . . . . . - 2v to ((v dd ) + 0.3v) v bus (note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2v to 5.5v ctrl (note 4) . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((v dd ) + 0.3v) output voltages com-, com+ (note 4) . . . . . . . . . . . . . . . . -2v to ((v dd ) + 0.3v) continuous current (audio switches) . . . . . . . . . . . . . . . . . 150ma peak current (audio switches) (pulsed 1ms, 10% duty cycle, max) . . . . . . . . . . . . . . . . 300ma continuous current (usb switches) . . . . . . . . . . . . . . . . . . . 40ma peak current (usb switches) (pulsed 1ms, 10% duty cycle, max) . . . . . . . . . . . . . . . . 100ma esd rating: hbm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>7kv mm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>450v cdm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>2kv thermal resistance (typical, notes 5, 6) ja (c/w) jc (c/w) 10 ld tqfn package . . . . . . . . . . . . 130 48.3 10 ld 3x3 tdfn package . . . . . . . . . . 110 20 maximum junction temperature (plastic package). . . . . . . +150c maximum storage temperature range . . . . . . . . . . . -65c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp operating conditions temperature range . . . . . . . . . . . . . . . . . . . . . . . . . -40c to +85c caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. 4. signals on d+, d-, l, r, com-, com+, ctrl, v bus exceeding v dd or gnd by specified amount are clamped. limit current to maximum current ratings. 5. ja is measured in free air with the component mounted on a high ef fective thermal conductivity te st board with ?direct attach? fe atures. see tech brief tb379. 6. for jc , the ?case temp? location is the center of the exposed metal pad on the package underside. electrical specifications - 2.7v to 3.6v supply test conditions: v dd = +3.0v, gnd = 0v, v bush = 3.8v, v busl = 3.2v, v ctrlh = 1.4v, v ctrll = 0.5v, (notes 7, 8), unless otherwise specified. parameter test conditions temp (c) min (note 9) typ max (note 9) units analog switch characteristics audio switches (l, r) analog signal range, v analog v dd = 3.0v, v bus = float, ctrl = 1.4v full -1.5 - 1.5 v on-resistance, r on v dd = 3.0v, v bus = float, ctrl = 1.4v, i comx = 100ma, v l or v r = -0.85v to 0.85v (see figure 3) +25 - 2.65 4 full - - 5.5 r on matching between channels, r on v dd = 3.0v, v bus = float, ctrl = 1.4v, i comx = 100ma, v l or v r = voltage at max r on over signal range of -0.85v to 0.85v (note 11) +25 - 0.02 0.13 full - - 0.16 r on flatness, r flat(on) v dd = 3.0v, v bus = float, ctrl = 1.4v, i comx = 100ma, v l or v r = -0.85v to 0.85v (note 10) +25 - 0.03 0.05 full - - 0.07 discharge pull-down resistance, r l , r r v dd = 3.6v, v bus = float, ctrl = 1.4v, v com- or v com+ = -0.85v, 0.85v, v l or v r = -0.85v, 0.85v, v d+ and v d- = floating, measure current through the discharge pull-down resistor and calculate resistance value. +25 - 50 - k usb switches (d+, d-) analog signal range, v analog v dd = 3.0v, v bus = 5.0v, ctrl = 0v or 3v full 0 - v dd v on-resistance, r on v dd = 3.3v, v bus = 4.4v, ctrl = 3.3v, i comx = 1ma, v d+ or v d- = 3.3v (see figure 4) +25 - 23.5 30 full - - 35 on-resistance, r on v dd = 3.6v, v bus = 4.4v, ctrl = 0v or 3.6v, i comx =40ma, v d+ or v d- = 0v to 400mv (see figure 4) +25 - 4.6 5 full - - 6.5 isl54205b
5 fn6557.0 september 25, 2007 r on matching between channels, r on v dd = 3.6v, v bus = 4.4v, ctrl = 0v or 3.6v, i comx =40ma, v d+ or v d- = voltage at max r on , (note 11) +25 - 0.06 0.5 full - - 0.55 r on flatness, r flat(on) v dd = 3.6v, v bus = 4.4v, ctrl = 0v or 3.6v, i comx = 40ma, v d+ or v d- = 0v to 400mv, (note 10) +25 - 0.4 0.6 full - - 1.0 off leakage current, i d+(off) or i d-(off) v dd = 3.6v, v bus = 0v, ctrl = 3.6v, v com- or v com+ = 0.5v, 0v, v d+ or v d- = 0v, 0.5v, v l and v r = float +25 -10 - 10 na full -70 - 70 na on leakage current, i dx v dd = 3.3v, v bus = 5.25v, ctrl = 0v or 3.6v, v d+ or v d- = 2.0v, v com- , v com+ , v l and v r = float +25 -10 2 10 na full -75 - 75 na dynamic characteristics turn-on time, t on v dd = 2.7v, r l = 50 , c l = 10pf (see figure 1) +25 - 67 - ns turn-off time, t off v dd = 2.7v, r l = 50 , c l = 10pf (see figure 1) +25 - 48 - ns break-before-make time delay, t d v dd = 2.7v, r l = 50 , c l = 10pf (see figure 2) +25 - 18 - ns skew, t skew v dd = 3.0v, v bus = 5.0v, ctrl = 0v or 3v, r l = 45 , c l = 10pf, t r = t f = 720ps at 480mbps, (duty cycle = 50%) (see figure 7) +25 - 50 - ps total jitter, t j v dd = 3.0v, v bus = 5.0v, ctrl = 0v or 3v, r l = 50 , c l = 10pf, t r = t f = 750ps at 480mbps +25 - 210 - ps propagation delay, t pd v dd = 3.0v, v bus = 5.0v, ctrl = 0v or 3v, r l = 45 , c l = 10pf ( see figure 7) +25 - 250 - ps crosstalk (channel-to-channel), r to com-, l to com+ v dd = 3.0v, v bus = float, ctrl = 3.0v, r l = 32 , f = 20hz to 20khz, v r or v l = 0.707v rms (2v p-p ) (see figure 6) +25 - -110 - db total harmonic distortion f = 20hz to 20khz, v dd = 3.0v, v bus = float, ctrl = 3.0v, v l or v r = 0.707v rms (2v p-p ), r l = 32 +25 - 0.06 - % usb switch -3db bandwidth signal = 0dbm, 0.2v dc offset, r l = 50 , c l = 5pf +25 - 630 - mhz d+/d- off capacitance, c d+(off) , c d-(off) f = 1mhz, v dd = 3.0v, v bus = float, ctrl = 3.0v, v d- or v d+ = v comx = 0v (see figure 5) +25 - 6 - pf l/r off capacitance, c loff , c roff f = 1mhz, v dd = 3.0v, v bus = 5.0v, ctrl = 0v or 3v, v l or v r = v comx = 0v (see figure 5) +25 - 9 - pf com on capacitance, c com-(on) , c com+(on) f = 1mhz, v dd = 3.0v, v bus = 5.0v, ctrl = 0v or 3v, v d- or v d+ = v comx = 0v, (see figure 5) +25 - 10 - pf power supply characteristics power supply range, v dd full 2.7 - 3.6 v positive supply current, i dd v dd = 3.6v, v bus = float or 5.25v, ctrl = 1.4v +25 - 6 8 a full - - 10 a positive supply current, i dd (low power state) v dd = 3.6v, v bus = 0v or float, ctrl = 0v or float +25 - 1 7 na full - - 140 na digital input characteristics v bus voltage low, v busl v dd = 2.7v to 3.6v full - - v dd + 0.2 v v bus voltage high, v bush v dd = 2.7v to 3.6v full v dd + 0.8 - - v ctrl voltage low, v ctrll v dd = 2.7v to 3.6v full - - 0.5 v electrical specifications - 2.7v to 3.6v supply test conditions: v dd = +3.0v, gnd = 0v, v bush = 3.8v, v busl = 3.2v, v ctrlh = 1.4v, v ctrll = 0.5v, (notes 7, 8), unless otherwise specified. (continued) parameter test conditions temp (c) min (note 9) typ max (note 9) units isl54205b
6 fn6557.0 september 25, 2007 ctrl voltage high, v ctrlh v dd = 2.7v to 3.6v full 1.4 - - v input current, i busl , i ctrll v dd = 3.6v, v bus = 0v or float, ctrl = 0v or float full -50 20 50 na input current, i bush v dd = 3.6v, v bus = 5.25v, ctrl = 0v or float full -2 1.1 2 a input current, i ctrlh v dd = 3.6v, v bus = 0v or float, ctrl = 3.6v full -2 1.1 -2 a v bus pull-down resistor, r vbus v dd = 3.6v, v bus = 5.25v, ctrl = 0v or float full - 4 - m ctrl pull-down resistor, r ctrl v dd = 3.6v, v bus = 0v or float, ctrl = 3.6v full - 4 - m notes: 7. v logic = input voltage to perform proper function. 8. the algebraic convention, whereby the most negative value is a minimum and the most pos itive a maximum, is used in this data sheet. 9. parts are 100% tested at +25c . over-temperature limits established by characterization and are not production tested. 10. flatness is defined as the difference between maximum and minimum value of on-resis tance over the specified analog signal ra nge. 11. r on matching between channels is calculated by s ubtracting the channel with the highest max r on value from the channel with lowest max r on value, between l and r or between d+ and d-. test circuits and waveforms logic input waveform is inverted for switches that have the opposite logic sense. figure 1a. measurement points repeat test for all switches. c l includes fixture and stray capacitance. figure 1b. test circuit figure 1. switching times electrical specifications - 2.7v to 3.6v supply test conditions: v dd = +3.0v, gnd = 0v, v bush = 3.8v, v busl = 3.2v, v ctrlh = 1.4v, v ctrll = 0.5v, (notes 7, 8), unless otherwise specified. (continued) parameter test conditions temp (c) min (note 9) typ max (note 9) units 50% t r < 20ns t f < 20ns t off 90% v bush 0v v input v busl t on logic input switch input switch output 90% v out v out v (input) r l r l r on () + ---------------------------- = switch input v bus v out r l c l comx audio or usb v bus 50 10pf gnd v dd c ctrl v input isl54205b
7 fn6557.0 september 25, 2007 figure 2a. measurement points figure 2b. test circuit figure 2. break-before-make time figure 3. audio r on test circuit figure 4. usb r on test circuit test circuits and waveforms (continued) 90% v bush v busl t d logic input switch output 0v v out v bus v bus comx r l c l v out 10pf 50 d- or d+ l or r v dd gnd v input c ctrl repeat test for all switches. c l includes fixture and stray capacitance. v dd c 0v or float l or r comx v bus gnd v l or r v 1 r on = v 1 /100ma 100ma repeat test for all switches. ctrl v dd c 4.4v to 5.25v d- or d+ comx v bus gnd v d- or d+ v 1 r on = v 1 /40ma 40ma repeat test for all switches. ctrl isl54205b
8 fn6557.0 september 25, 2007 figure 5. capacitance test circuit figure 6. audio crosstalk test circuit figure 7a. measurement points figure 7b. test circuit figure 7. skew test test circuits and waveforms (continued) v dd c gnd audio or usb comx v bus impedance analyzer v busl or repeat test for all switches. ctrl v bush 0v or float analyzer v dd c l or r signal generator r l gnd v bus 32 nc comx r or l signal direction through switch is reversed, worst case values are recorded. repeat test for all switches. ctrl comx din+ din- out+ out- 50% 50% 90% 10% 10% 10% 10% 90% 90% 50% 90% 50% t ri t fi t ro t f0 t skew_i t skew_o out+ c l com- d+ gnd v dd c d- com+ c l out- din+ din- |tro - tri| delay due to switch for ri sing input and rising output signals. |tfo - tfi| delay due to switch for falling input and falling output signals . |tskew_0| change in skew through the switch for output signals. |tskew_i| change in skew through the switch for input signals. 15.8 15.8 143 143 45 45 ctrl v bus v bush isl54205b
9 fn6557.0 september 25, 2007 application block diagram detailed description the isl54205b device is a dual single pole/double throw (spdt) analog switch device th at operates from a single dc power supply in the range of 2.7v to 3.6v. it was designed to function as a dual 2 to 1 multiplexer to select between usb differential data signals and audio l and r stereo signals. it comes in tiny tqfn and tdfn packages for use in mp3 players, pdas, cell phones, and other personal media players. the part consists of two 3 audio switches and two 5 usb switches. the audio switches ca n accept signals that swing below ground. they were designed to pass audio left and right stereo signals, that are ground referenced, with minimal distortion. the usb switches were designed to pass high-speed usb differential data signals with minimal edge and phase distortion. the isl54205b was specifically designed for mp3 players, cell phones and other personal media player applications that need to combine the audio headphone jack and the usb data connector into a single shared connector, thereby saving space and component cost. see ?application block diagram? on page 9. the isl54205b incorporates circui try for the detection of the usb v bus voltage, which is used to switch between the audio codec drivers and usb transceiver of the mp3 player or cell phone. the isl54205b contains a logic control pin (ctrl) that when driven low while v bus is low, opens all switches and puts the part in to a low power state, drawing typically 1na of i dd current. a detailed description of the two types of switches is provided in the following sections. the usb transmission and audio playback are intended to be mutually exclusive operations. audio switches the two audio switches (l, r) are 3 switches that can pass signals that swing below gr ound. crosstalk between the audio switches over the audio band is <-110db. over a signal range of 1v (0.707v rms ) with v dd >2.7v, these switches have an extremely low r on resistance variation. they can pass ground referenced audio signals with very low distortion (<0.06% thd+n) when delivering 15.6mw into a 32 headphone speaker load. see figures 8, 9, 10, and 11 thd+n in the ?typical performance curves on page 11. these switches are uni-dire ctional switches. the audio drivers should be connected at the l and r side of the switch (pins 7 and 8) and the speaker loads should be connected at the com side of the switch (pins 3 and 4). the audio switches are active (turned on) whenever the v bus voltage is to v dd + 0.2v or floating and the ctrl voltage to 1.4v. note: whenever the audio switches are on the usb transceivers need to be in the high impedance state. usb switches the two usb switches (d+, d-) are bidirectional switches that can pass rail-to-rail signal s. when powered with a 3.6v supply these switches have a nominal r (on) of 4.6 over the signal range of 0v to 400mv with a r (on) flatness of 0.4 . the r (on) matching between the d+ and d- switches over this signal range is only 0.06 ensuring minimal impact by the switches to usb high spee d signal transitions. as the signal level increases the r (on) resistance increases. at signal level of 3.3v the switch resistance is nominally 23 . the usb switches were specifically designed to pass usb 2.0 high-speed (480mbps) differen tial signals typically in the range of 0v to 400mv. they have low capacitance and high bandwidth to pass the usb high-speed signals with isl54205b usb transceiver high-speed codec com - com + v bus gnd d- d+ l r v dd ctrl logic circuitry controller 22k 4m 4m 50k 50k usb/headphone jack isl54205b
10 fn6557.0 september 25, 2007 minimum edge and phase distortion to meet usb 2.0 high speed signal quality specifications. see high-speed eye diagram in the ?typical performance curves? on page 12, figure 12. the usb switches can also pass usb full-speed signals (12mbps) with minimal distortion and meet all the usb requirements for usb 2.0 full-speed signaling. see full-speed eye diagram in the ?typical performance curves? on page 13, figure 13. the maximum signal range for the usb switches is from -1.5v to v dd . the signal voltage at d- and d+ should not be allowed to exceed the v dd voltage rail or go below ground by more than -1.5v. the usb switches are active (turned on) whenever the v bus voltage is to v dd + 0.8v. v bus is internally pulled low, so when v bus is floating, the usb switches are off. note: whenever the usb switches are on the audio drivers of the codec need to be at ac or dc ground or floating to keep from interfering with the data transmission. isl54205b operation the discussion that follows will discuss using the isl54205b in the ?application block diagram? on page 9. logic control the state of the isl54205b device is determined by the voltage at the vbus pin (pin 2) and the ctrl pin (pin 10). refer to ?truth table? on page 2. the vbus pin and ctrl pin are internally pulled low through 4m resistors to ground and can be left floating. the ctrl control pin is only active when v bus is logic ?0?. logic control voltage levels: v bus = logic ?0? (low) when v bus v dd + 0.2v or floating. v bus = logic ?1? (high) when v bus v dd + 0.8v ctrl = logic ?0? (low) when 0.5v or floating. ctrl = logic ?1? (high) when 1.4v audio mode if the vbus pin = logic ?0? and ctrl pin = logic ?1,? the part will be in the audio mode. in audio mode the l (left) and r (right) 3 audio switches are on and the d- and d+ 5 switches are off (high impedance ). in a typical application, v dd will be in the range of 2.7v to 3.6v and will be connected to the battery or ld o of the mp3 player or cell phone. when a headphone is plugged into the common connector, nothing gets connected at the vbus pin (it is floating) and as long as the ctrl = logic ?1,? the isl54205b part remains in the audio mode and the audio drivers of the player can dr ive the headphones and play music. usb mode if the vbus pin = logic ?1? and ctrl pin = logic ?0? or logic ?1,? the part will go into usb mode. in usb mode, the d- and d+ 5 switches are on and the l and r 3 audio switches are off (high impedance). when a usb cable from a computer or usb hub is connected at the common connector, the voltage at the vbus pin will be driven to be in the range of 4.4v to 5.25v. the isl54205b part will go into the usb mode. in usb mode, the computer or usb hub transce iver and the mp3 player or cell phone usb transceiver are connected and digital data will be able to be transmitted back and forth. when the usb cable is disconnected, the isl54205b automatically turns the d+ and d- switches off. low power mode if the vbus pin = logic ?0? and ctrl pin = logic ?0,? the part will be in the low power mode. in the low power mode, the audio switches and the usb switches are off (high impedance). in this state, the device draws typically 1na of current. external vbus series resistor the isl54205b contains a clamp circuit between vbus and vdd. whenever the vbus volt age is greater than the vdd voltage by more than 2.55v, current will flow through this clamp circuitry into the v dd power supply bus. during normal usb operation, v dd is in the range of 2.7v to 3.6v and v bus is in the range of 4.4v to 5.25v. the clamp circuit is not active and no current will flow through the clamp into the v dd supply. in a usb application, the situation can exist where the v bus voltage from the computer coul d be applied at the vbus pin before the v dd voltage is up to its normal operating voltage range and current will flow through the clamp into the v dd power supply bus. this current could be quite high when v dd is off or at 0v and could potent ially damage other components connected in the circuit. in the application circuit, a 22k resistor has been put in series with the vbus pin to limit the current to a safe level during this situation. it is recommended that a current lim iting resistor in the range of 10k to 50k be connected in series with the vbus pin. it will have minimal impact on the logic level at the vbus pin during normal usb operation and protec t the circuit during the time vbus is present before vdd is up to its normal operating voltage. note: no external resistor is required in applications where v bus will not exceed v dd by more than 2.55v. power the power supply connected at vdd (pin 1) provides power to the isl54205b part. its voltage should be kept in the range of 2.7v to 3.6v when used in a usb/audio application to ensure you get proper switching when the v bus voltage is at its lower limit of 4.4v. isl54205b
11 fn6557.0 september 25, 2007 typical performance curves t a = +25c, unless otherwise specified figure 8. thd+n vs supply voltage vs frequenc y figure 9. thd+n vs sig nal levels vs frequency figure 10. thd+n vs output voltag e figure 11. thd+n vs output power thd+n (%) frequency (hz) 20 200 2k 20k 0.04 0.05 0.06 0.07 0.08 0.09 0.10 0.11 v dd = 2.6v v dd = 2.7v v dd = 3.6v v dd = 3v r load = 32 v load = 0.707v rms thd+n (%) frequency (hz) 20 200 2k 20k r load = 32 v dd = 3v 0 0.1 0.2 0.3 0.4 2v p-p 1v p-p 3v p-p 2.5v p-p thd+n (%) output voltage (v p-p ) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 0.1 0.2 0.3 0.4 0.5 r load = 32 freq = 1khz v dd =3v thd+n (%) output power (mw) 0 1020304050 0 0.1 0.2 0.3 0.4 0.5 r load = 32 freq = 1khz v dd =3v isl54205b
12 fn6557.0 september 25, 2007 figure 12. eye pattern: 480mbps with switch in the signal path typical performance curves t a = +25c, unless otherwise specified (continued) time scale (10ns/div) voltage scale (0.1v/div) isl54205b
13 fn6557.0 september 25, 2007 figure 13. eye pattern: 12mbps with switches in the signal path typical performance curves t a = +25c, unless otherwise specified (continued) time scale (10ns/div) voltage scale (0.5v/div) v dd = 3.3v isl54205b
14 fn6557.0 september 25, 2007 figure 14. frequency response die characteristics substrate potential (powered up): gnd transistor count: 98 process: submicron cmos typical performance curves t a = +25c, unless otherwise specified (continued) frequency (hz) 0 -1 normalized gain (db) 1m 10m 100m 1g v in = 0.2v p-p to 2v p-p r l = 50 -2 -3 -4 1 usb switch isl54205b
15 fn6557.0 september 25, 2007 isl54205b ultra thin quad flat no-lead plastic package (utqfn) 6 b e a d 0.10 c 2x 2 0.10 m c a b 0.05 m c (nd-1) x e c 0.05 c a 0.10 c a1 seating plane e index area pin #1 id 3 5 (datum a) (datum b) n-1 1 n nx l nx b 2 1 n top view bottom view side view nx (b) section "c-c" for odd terminal/side e cc 5 c l terminal tip (a1) l detail ?a? pin 1 id l 0.05 min 0.10 min 0.10 c 2x 4xk b l10.2.1x1.6a 10 lead ultra thin quad flat no-lead plastic package symbol millimeters notes min nominal max a 0.45 0.50 0.55 - a1 - - 0.05 - a3 0.127 ref - b 0.15 0.20 0.25 5 d 2.05 2.10 2.15 - e 1.55 1.60 1.65 - e 0.50 bsc - k0.20 --- l 0.35 0.40 0.45 - n102 nd 4 3 ne 1 3 0- 12 4 rev. 3 6/06 notes: 1. dimensioning and tolerancing conform to asme y14.5-1994. 2. n is the number of terminals. 3. nd and ne refer to the number of terminals on d and e side, respectively. 4. all dimensions are in millim eters. angles are in degrees. 5. dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or mark feature. 7. maximum package warpage is 0.05mm. 8. maximum allowable burrs is 0.076mm in all directions. 9. same as jedec mo-255uabd except: no lead-pull-back, "a" min dimension = 0.45 not 0.50mm "l" max dimension = 0.45 not 0.42mm. 10. for additional information, to assist with the pcb land pattern design effort, see intersil technical brief tb389. 2.00 0.80 1.75 0.25 0.50 0.275 2.50 land pattern 10
16 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6557.0 september 25, 2007 isl54205b thin dual flat no-lead plastic package (tdfn) // nx (b) section "c-c" for odd terminal/side e cc 5 c l terminal tip (a1) bottom view a 6 area index c c 0.10 0.08 side view 0.10 2x e a b c 0.10 d top view cb 2x 6 8 area index nx l e2 e2/2 ref. e n (nd-1)xe (datum a) (datum b) 5 0.10 8 7 d2 b a c n-1 12 plane seating c a a3 nx b d2/2 nx k l1 9 l m l10.3x3a 10 lead thin dual flat no-lead plastic package symbol millimeters notes min nominal max a 0.70 0.75 0.80 - a1 - - 0.05 - a3 0.20 ref - b 0.20 0.25 0.30 5, 8 d 2.95 3.0 3.05 - d2 2.25 2.30 2.35 7, 8 e 2.95 3.0 3.05 - e2 1.45 1.50 1.55 7, 8 e 0.50 bsc - k 0.25 - - - l 0.25 0.30 0.35 8 n 10 2 nd 5 3 rev. 3 3/06 notes: 1. dimensioning and tolerancing conform to asme y14.5-1994. 2. n is the number of terminals. 3. nd refers to the number of terminals on d. 4. all dimensions are in millim eters. angles are in degrees. 5. dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or mark feature. 7. dimensions d2 and e2 are fo r the exposed pads which provide improved electrical and thermal performance. 8. nominal dimensions are provided to assist with pcb land pattern design efforts, see intersil technical brief tb389. 9. compliant to jedec mo-229-weed-3 except for d2 dimensions.

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